Understanding Clock Counter Complementing in Digital Circuits

In summary, Each digit complements and complements the next digit, starting from the 0000 state. The first clock pulse increments the first FF from 0 to 1, then the next clock pulse toggles the output of the first FF from 1 to 0, which acts as the clock edge for the second FF. This process continues for each successive clock pulse, resulting in the numbers in between 0000 and 1111. The key is that the output of one FF feeds into the next higher significant bit FF.
  • #1
transgalactic
1,395
0
i understood that each time a digit complements
and complements the next digit etc..
but i can't see how it works
because if its truee then from the 0000 state
by one pulse we will have 1111

i can't ubderstand how we get the numbers between

here is circuit
http://img146.imageshack.us/my.php?image=img86761zw2.jpg
 
Physics news on Phys.org
  • #2
No, the first clock pulse increments the first FF 0-->1, then the next clock pulse toggles the output of the first FF 1-->0, and that falling edge is the clock edge to the 2nd FF. So the 2nd clock takes the output from 0001--> 0010.

The key here is that the output of on FF feeds the next higher significant bit FF. Do you see that now?
 
  • #3
oohh ok i am starting to see it
 

Related to Understanding Clock Counter Complementing in Digital Circuits

What is clock counter complementing in digital circuits?

Clock counter complementing is a technique used in digital circuits to represent negative numbers using binary numbers. It involves inverting the bits of a positive number and adding 1 to the result, resulting in the 2's complement representation of the negative number.

Why is clock counter complementing used?

Clock counter complementing is used because it allows for efficient representation and manipulation of both positive and negative numbers in digital circuits. It also simplifies the arithmetic operations involved in calculations.

How does clock counter complementing affect the circuit's performance?

Clock counter complementing does not significantly affect the performance of the circuit. However, it does require additional logic gates and circuitry, which may slightly increase the complexity and cost of the circuit.

What are the advantages of using clock counter complementing?

The main advantage of using clock counter complementing is that it allows for a more efficient and compact representation of both positive and negative numbers in digital circuits. It also simplifies the arithmetic operations and reduces the likelihood of errors in calculations.

Are there any limitations to using clock counter complementing?

One limitation of clock counter complementing is that it requires a fixed number of bits to represent a number. This can lead to overflow or loss of precision when dealing with large numbers. It also does not work well with floating-point numbers.

Similar threads

  • Engineering and Comp Sci Homework Help
Replies
2
Views
1K
  • Engineering and Comp Sci Homework Help
Replies
10
Views
1K
  • Engineering and Comp Sci Homework Help
Replies
9
Views
6K
  • Engineering and Comp Sci Homework Help
Replies
6
Views
4K
  • Engineering and Comp Sci Homework Help
Replies
1
Views
3K
  • Engineering and Comp Sci Homework Help
Replies
5
Views
2K
  • Engineering and Comp Sci Homework Help
Replies
1
Views
2K
Replies
17
Views
2K
  • Engineering and Comp Sci Homework Help
Replies
10
Views
3K
  • Engineering and Comp Sci Homework Help
Replies
4
Views
1K
Back
Top